The importance of charge detection in quantum computing (QC) is recently emphasized in numerous publications, including the paper “Charge Detection Enables Free-Electron Quantum Computation” by C. W. J. Beenakker, D. P. DiVincenzo, C. Emary and M. Kindermann, Physical Review Letters, Vol. 93, July 2004. Beenakker et al. propose in their theoretical paper that the electrometer scheme will enable “free-electron quantum computation” and parity check.
For scalable and practical QC, numerous physical limitations are expected. QC requires nanoscale fabrication of qubits because the individual qubits must each consist of only a single electron cell. In addition, the tight control of lithographic dimensions of qubits is required, which poses significant challenges in processing of qubits. Furthermore, each qubit must necessarily be addressed through interconnects externally, unlike with conventional Boolean logic based computing in Si CMOS technology. Although the state-of-the-art lithographic tools are utilized for the fabrication of arrays of qubits, some degree of size fluctuations will be present, which leads to a fluctuation in the number of electrons in the qubits. If more than one electron is in a qubit, then this can inhibit proper operation of a QC algorithm. Therefore, prior to an operation of QC algorithm, accurate calibration of each qubit is required to detect if any of the qubits contain more than one electron which would cause computing errors.
Capacitance in quantum dots (q-dots) depends strongly on the discrete density of states (DOS) or charge variation divided by the chemical potential. Thus, a capacitance measurement can, in principle, probe the discrete single electron charging events in q-dots. However, there is significant technical challenge because the capacitance signal is extremely small (10's of aF, i.e. attofarads, 10−18 Farads) and influenced by parasitic capacitance. Most of the current research has been using a lateral electron transport, which relies on multiple gates and interconnects, for the calibration of individual qubits. However, to develop scalable QC, the lateral transport scheme would not be practical due to its use of high density interconnects in a very limited space as well as peripheral requirements.
Cryogenic capacitance bridge circuits have been utilized to detect a single electron charging event, in which the off-null signal at the balance point is phase-sensitively detected by a cryogenic high electron mobility transistor (HEMT) immersed in LHe3 (an isotope of Helium in liquid state) and dual-channel phase-loop-locked amplifiers outside of the cryostat (i.e. the apparatus needed to maintain the low cryogenic temperature necessary). The total power dissipation of the HEMT transistors used in these measurements is 15 μW at 280 mK (0.28 Kelvin, or about −272.72 degrees Celsius). In the referenced measurements, the input voltage noise is 3 nV/√Hz, yielding charge noise of 0.002 e/√Hz in the case of a 0.1 pF shunt capacitance.
A cryogenic bridge geometry can be used to measure single-electron charging events under air-bridged post gates. The chemical potential change due to the AC excitation amplitude is kept below 200 μeV. The typical excitation frequency (KHz MHz) is determined by the RC charging time in the cryogenic set-up. The speed of the measurement depends on the bandwidth for better signal-to-noise ratio.